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System-On-A-Chip Verification: Methodology and Techniques

System-On-A-Chip Verification: Methodology and Techniques

          
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About the Book

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:

  1. Explanation of the objective involved in performing verification after a given design step;
  2. Features of options available;
  3. When to use a particular option;
  4. How to select an option; and
  5. Limitations of the option.
This exciting new book will be of interest to all designers and test professionals.


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Product Details
  • ISBN-13: 9781475774689
  • Publisher: Springer
  • Publisher Imprint: Springer
  • Edition: Softcover reprint of the original 1st ed. 2001
  • Language: English
  • Returnable: N
  • Spine Width: 21 mm
  • Weight: 553 gr
  • ISBN-10: 1475774680
  • Publisher Date: 23 Apr 2013
  • Binding: Paperback
  • Height: 234 mm
  • No of Pages: 372
  • Series Title: English
  • Sub Title: Methodology and Techniques
  • Width: 156 mm


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