Sahand KashaniSahand Kashani received his Master's in computer engineering from EPFL in 2017. He is currently a PhD candidate in the School of Computer and Communication Sciences at EPFL. His research focuses on rethinking the traditional FPGA compiler flow to impove hardware design productivity for modern compute-intensive FPGA workloads. Sahand is a former student of René's and has been working with FPGAs for over seven years. He is an avid systems geek and enjoys transmitting his passion for digital design and reconfigurable computing to students. Read More Read Less